Provides methods, systems and apparatus for coupling a general purpose
processor (GPP) to an application specific instruction set processor
(ASIP) in such a manner that the GPP can include execute instructions
that do not normally comprise part of its instruction set architecture
(ISA). The GPP is coupled to the ASIP via a coprocessor port such that
instructions issued by the GPP to the port are conveyed to a novel
pre-decoder module of the ASIP. The pre-decoder module translates the GPP
instruction into operation codes for ASIP instructions to be executed in
the ASIP or to an address in the ASIP instruction memory that identifies
a start address for a plurality of ASIP instructions defining a complex
application specific function. Once the ASIP has executed the
instructions it shares the result of the execution with the GPP. In this
way, the GPP takes advantage of the ASIP in its ability to more quickly
execute an application specific program/procedure.