A multiport switch assembly comprises a plurality of discrete switch devices coupled together in a way that virtualizes the behavior of a multiport switch assembly. Each of said switch devices preferably has fewer ports than the number of ports made externally available by the multiport switch assembly. The multiport switch assembly preferably comprises a plurality of tiers of switch devices and a processor connected directly or indirectly to all or at least some of the switch devices. The processor executes code that permits the multiport switch assembly to appear, from the viewpoint of external logic (e.g., management entities, end nodes, routers, etc.), to operate as a single switch device. This alleviates the burden on the external logic, which otherwise would have to control each individual switch device to accomplish the desired switching behavior of the switch assembly.