A structure that is well suited to connecting an MTJ device to a CMOS integrated circuit is described. It is built out of three layers. The bottom layer serves as a seed layer for the center layer, which is alpha tantalum, while the third, topmost, layer is selected for its smoothness, its compatibility with the inter-layer dielectric materials, and its ability to protect the underlying tantalum. A method for its formation is also described.

 
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> Non-planar flash memory having shielding between floating gates

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