A semiconductor device is provided that can perform simultaneous writing of a large number of bits, without an increase in chip size. This semiconductor device includes: a write data bus via which data are written into memory cells; a read data bus via which the data are read from the memory cells; a first write amplifier that writes data into the memory cells via the read data bus at the time of high-speed writing; a second write amplifier that writes data into the memory cells via the write data bus at the time of high-speed writing; a first sense amplifier that reads verified data from the memory cells via the read data bus; and a second sense amplifier that reads verified data from the memory cells via the write data bus.