A semiconductor integrated circuit device includes macros and area I/Os. The macros are arranged in optional locations of a first empty area of a gate area in a center portion of a chip, respectively. Each of the area I/Os contains a plurality of area I/O buffers, and is arranged in an optional location of a second empty area of a total area of the gate area and a buffer area in a circumferential portion of the chip. A first macro of the macros is connected with a specific one of the area I/Os. Here, the specific area I/O may be related to the first macro and be arranged in relation to a location for the first macro to be arranged.