A method, system and computer program product for processing in a
multiprocessor data processing system are disclosed. The method includes,
in response to executing a load-and-reserve instruction in a processor
core, the processing core sending a load-and-reserve operation for an
address to a lower level cache of a memory hierarchy, invalidating data
for the address in a store-through upper level cache, and placing data
returned from the lower level cache into the store-through upper level
cache.