An analog-to-digital converter (ADC) disposed in a data reception path to
convert data from an analog format to a digital format is switched
between two or more power modes to conserve power when data is not being
received. ADC stays in a lower power-lower precision mode until an
inbound data is detected, at which time the ADC switches to a higher
power-higher precision mode to convert the data. Once data conversion is
completed, the ADC switches back to the lower power-lower precision mode
to conserve power.