A memory hub includes a reception interface that receives data words and captures the data words in response to a first clock signal in a first time domain. The interface also provides groups of the captured data words on an output in response to a second clock signal in a second time domain. A transmission interface is coupled to the reception interface to receive the captured data words and captures the data words in response to a third clock signal in the first time domain. This interface provides the captured data words on an output. Local control circuitry is coupled to the output of the reception interface to receive the groups of data words and develops memory requests corresponding to the groups of data words. The first clock domain is defined by clock signals having frequencies higher than frequencies of clock signals in the second clock domain.

 
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> Double data rate scheme for data output

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