An analog-to-digital converter error detector suitable for single-chip control loop applications employs a single comparator determining the difference between an initial input voltage and a reference voltage in one or more conversion iterations, with the difference reduced in nonlinear steps during each conversion iteration based on the ratio between sampling and discharge capacitances. The number of conversion iterations required to reduce the initial input voltage to below the reference voltage is counted as representing the difference, with output codes representing the conversion iteration count having a step size increasing with the count value and selected to reduce downstream processing.

 
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> System and method for handling bad pixels in image sensors

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