A circuit provides an inhibition to the short circuit between the bit line and the capacitance contact, without employing a self alignment contact (SAC) process. A hard mask is formed on the bit line upper surface and a side wall formed on the side surface of the bit line by etching back a nitride film. A bit contact interlayer film without the SAC structure is etched off except where bit line is formed. A direct nitride film is formed on the entire top and side surface of the bit line so as to cover the bit line in one processing step. Since the upper and side nitride film thicknesses are substantially the same, the height of the bit line can be reduced, enabling further miniaturization. In addition, since the sidewall nitride film is formed without an etch back process, it can more easily be formed with a constant film thickness.