A TAD (time analog/digital) type of A/D converter has plural series-connected delay units each producing a delay in accordance with the level of a converter input voltage, with a first-stage delay unit receiving a pulse signal at commencement of each A/D conversion sampling interval, and a latch/encoder circuit detecting the total number of delay units traversed by the pulse signal by the end of the sampling interval, to obtain a numeric value expressing the input voltage level. To ensure uniformity of the delays of the delay units, these are formed using transistors of larger size than transistors of other circuits such as the latch/encoder circuit.

 
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> Non-linear distribution of voltage steps in flash-type A/D converters

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