Various embodiments of the present invention are directed to
implementation and use of logic-state-storing, impedance-encoded
nanoscale, impedance-encoded latches that store logic values as impedance
states within nanoscale electronic circuits that employ impedance-driven
logic. In certain of these embodiments, use of nanoscale,
impedance-encoded latches together with nanoscale electronic circuits
that employ impedance-driven logic avoids cumulative degradation of
voltage margins along a cascaded series of logic circuits and provides
for temporary storage of intermediate logic values, allowing for
practical interconnection of nanowire-crossbar-implemented logic circuits
through nanoscale, impedance-encoded latches to other
nanowire-crossbar-implemented logic circuits in order to implement
complex, nanoscale-logic-circuit pipelines, nanoscale-logic-circuit-based
state machines, and other complex logic devices with various different
interconnection topologies and corresponding functionalities.