When copy instruction details are transferred to a first storage control unit from an application program, a channel processor captures the instruction details into local memory. Then, the instruction details are analyzed, and based on the analysis result, an open remote copy/MRCF instruction is output to an open remote copy/MRCF control section. If the instruction details have no problem, a response is made to a host unit that the writing response is normally made. To be ready for reading of inquiry information by the host unit, shared memory is searched for the inquiry information to create output data from the first storage control unit to the host unit. With such a structure, a storage device in a disk array apparatus external to another disk array apparatus can be used as resources of any device connectable to higher-level systems.

 
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> Low power memory controller that is adaptable to either double data rate DRAM or single data rate synchronous DRAM circuits

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