A layout of a programmable interconnect structure, comprising: an active
region; and an even plurality of gate regions dividing the active region
into a plurality of active stripes, said active stripes arranged into
disjoint first, second and third sets; and a plurality of interconnect
wires, each interconnect wire coupled to a contact in an active stripe of
the first set; and an input wire coupled to a contact in each of the
active stripes of said second set; and an output wire coupled to a
contact in each of the active stripes of said third set; and a buffer
layout comprising one or more buffer gate regions and one or more buffer
active regions, wherein the input wire is further coupled to a buffer
gate region and the output wire is further coupled to a buffer active
region.