The nonvolatile semiconductor memory device of this invention has a trench region in a semiconductor substrate and has a NAND type memory cell unit in three dimensions in both sides of a side wall of one trench region, respectively. And these NAND memory cell units are connected to one bit line. In each NAND type memory cell unit, a plurality of the memory cell transistors and the selective gate transistors are connected in series. These pluralities of the memory cell transistors and the selective gate transistors are provided in the same trench region. Moreover, in the nonvolatile semiconductor memory device of this invention, an insulating layer containing a lamination structure of a silicon oxide film, a silicon nitride film and a silicon oxide film, or silicon, or metal or other nano crystals of conductivity substance is used for an electric charge accumulation layer of the memory cell transistor instead of a conventional floating gate.