An integrated circuit designing support apparatus includes a storage unit
and a processing unit. The storage unit stores an RTL (Register Transfer
Level) description with description of structurization for structurizing
an RTL description model for an integrated circuit into modules, and a
correspondence table which shows correspondence relation of each of
output ports of a first module of the modules and a corresponding one of
output ports of a second module of the modules. The processing unit
structurizes the RTL description model into the modules, generates output
port data indicating the output ports of each of the first and second
modules, generates the correspondence table from the output port data to
store in the storage unit, carries out a tracing operation on a signal
route from each of the output ports of each of the first and second
modules toward an input port side by using the correspondence table, and
determines whether the first and second modules have an overlapping
portion, based on the tracing operation results.