A SiP (System-in-Package) having large-capacity passive elements incorporated therein or mounted thereon is provided. On an interposer made of a silicon substrate, metal substrate or glass substrate having via-holes formed therein, IC chips, or a plurality of chips, passive elements formed on a silicon substrate, metal substrate or glass substrate, are mounted in a face-up manner and re-wired en bloc on the chip. Because all of the silicon substrate, metal substrate and glass substrate are durable against high-temperature annealing for crystallizing a high-dielectric-constant material, large-capacity passive elements can be formed on the substrate which serves as an interposer or on the re-wiring of the chips to be mounted. It is also allowable that large-capacity passive elements formed on the silicon substrate, metal substrate or glass substrate is divided into chips, and that the resultant chips are mounted together with the IC chips.