A semiconductor integrated circuit design tool includes a reference data
defining module configured to define design data of one of a plurality of
transistors implementing the semiconductor integrated circuit as
reference data, a simulator configured to simulate each effective channel
length of the transistors, based on the design data and a reference
channel length based on the reference data, and an adjuster configured to
adjust gate lengths of gate electrodes of the transistors to reduce a
difference between the effective channel length and the reference channel
length.