A low voltage logic circuit with asynchronous SET and/or RESET functions is described herein. The low voltage logic circuit may be primarily used in forming low voltage flip-flop circuits, but may also be used to form multiplexers and other logic configurations. The flip-flop circuit described herein improves upon existing low voltage architectures by providing a flip-flop circuit, which can operate at relatively low supply voltages (e.g., less than about 1.8V), with SET and/or RESET capability. In doing so, the improved flip-flop circuit may be used within a phase frequency detector, programmable counter, or frequency divider of a phase locked loop (PLL) or delay locked loop (DLL) device. However, the improved flip-flop circuit may be used with any low voltage circuit or device that may require, use or benefit from a SET or RESET function. In some embodiments, one or more level shift circuits may be included so that the low voltage flip-flop circuit may receive CML, TTL and/or CMOS logic levels (among others).