A method or circuit is disclosed for sensing an output of a predetermined memory cell having a high resistance state or a low resistance state. A predefined voltage is applied to the predetermined memory cell to generate an output current reflecting a resistance of the predetermined memory cell, and to one or more reference memory cells to generate a first reference current reflecting the high resistance state, and a second reference current reflecting the low resistance state. A first differential value is provided to represent the difference between the output current and the first reference current. A second differential value is provided to represent the difference between the output current and second reference current. The first differential value with the second differential value to generate a digital output representing the resistance state of the predetermined memory cell.