A semiconductor device comprising the multi-chip stack structure that involves improved degree of freedom in routing arrangement and has reduced thickness is provided. A semiconductor device, comprising: a substrate; a lower semiconductor chip provided on the substrate; an upper semiconductor chip provided on the lower semiconductor chip; and a silicon spacer with a rerouting disposed between the lower semiconductor chip and the upper semiconductor chip, and including a protruding portion protruding farther outward than an outer periphery of the lower semiconductor chip, is provided. Second electrode pads provided on the protruding portion and first electrode pads provided on the lower semiconductor chip are connected via interconnects including through electrodes of the silicon spacer with the rerouting.

 
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> Fan out type wafer level package structure and method of the same

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