A coded image capture and decoding system includes an image capture unit and a host unit which operate to capture image data, generate a plurality of coded images, and, thereafter, to decode the plurality of coded images with a non-dedicated host processing circuitry. The system comprises an image capture unit and a host unit which may be installed together or separately in one or more physical devices. The image capture unit includes an image processor, an image buffer, an optical unit, an image buffer and an interface module. The host unit includes a host processor, conventional hardware and software functions, and an interface module. During a capture cycle, the image capture unit repeatedly captures images from a coded target. When the capture cycle is complete, the image capture unit attempts to interrupt the host unit. The host unit responds to the interrupt when it is available, receives the plurality of coded images over a communication link, and performs decode processing of the coded images. A proximity detector and proximity screening rules may be employed within the image capture unit in an attempt to prevent non-code images from being delivered to the host processor. The host processor may also operate on a composite image and/or parallel process the plurality of coded images to achieve a valid decode.