A method and system of decoding data including a padding unit, interleaver unit and decoder. A block of data symbols where each data symbol represents an encoded data bit, is received by the padding unit. The padding unit determines if the block data symbols has a number of data symbols equal to a threshold value M. If the number of data symbols is less than M, the padding unit pads the block of data symbols with at least one padding symbol. The decoder decodes the padded block of data symbols.

 
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> Method and circuit configuration for synchronous resetting of a multiple clock domain circuit

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