The invention relates to a process and a corresponding device for circuit design by means of high-level synthesis in which a register-transfer description is determined from a system description of a circuit to be designed with an aim of designing the circuit with as little power consumption as possible. Particularly, in order to sufficiently take into account the more and more sharply increasing percentage of power consumption due to connecting wires, an iterative process is proposed in which, immediately after modification of an initial register-transfer description, a modified floorplan is also developed in which it can be recognized immediately whether or not the modification of the initial register-transfer description has brought with it a reduction of the power consumption of the connecting wires.