A semiconductor wafer includes a semiconductor substrate having a plurality of integrated circuits and electrical interconnections electrically connected to each of the integrated circuits. The semiconductor substrate includes bonding pads formed on a surface of the semiconductor substrate. Each of the bonding pads is part of a corresponding electrical interconnection. First resin layers are each disposed on each of a plurality of areas on the semiconductor substrate and have ridged edges. Wirings are each disposed over a corresponding bonding pad and a corresponding first resin layer and are electrically connected to the corresponding bonding pad. External connection terminals are each disposed on a corresponding wiring and are electrically connected to the corresponding wiring.