A method is provided that includes pattern-matching portions of a block diagram model as being equivalent, and creation of a common set of instructions in place of the occurrences of the pattern-matched portions to enhance the efficiency of simulation or generated code for the block diagram model, such as by a reduced image size. Diagnostics are also available to provide information on the execution structure of the block diagram and guidance on how to modify block of the block diagram to obtain reduced image size by increasing the amount of matching patterns. Also, automatically generated hierarchical structures, a tool to control the function signature and the ability for a user to control file packaging which all provide flexible control over the generated code for block diagrams, are provided.

 
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> Semiconductor device with self-test circuits and test method thereof

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