The PROM area is adjacent to the normal memory cell area. The data writing (normal writing) and the data reading (normal reading) for normal memory cell areas and the data writing (redundant writing) for the PROM area are carried out from the side of the normal memory cell areas. The data reading (redundant reading) for the PROM area is carried out from the side of the PROM area. In the PROM area, the PROM cells having the same structure as that of the normal memory cells are connected to the redundant sub bit lines. In the redundant writing, in the select gate area, the redundant sub bit lines and main bit lines are connected. In the redundant reading, in the redundant gate area having the same layout as that of the select gate area, the redundant sub bit lines are connected to redundant bit lines.