A successive approximation type of analog-to-digital converter fabricated in a MOS type semiconductor integrated circuit includes a comparison voltage generator for generating a comparison voltage to be compared with an analog signal voltage, a comparator for sequentially comparing the comparison voltage with the analog signal voltage to produce a comparison result, and a comparison result processor for developing the comparison result to an output register connected to a bus and feeding the comparison voltage generator with a comparison voltage value determined according to the comparison result. The comparator includes two sets of P-channel transistors connected in serial. In each set, one transistor is connected in parallel to, and larger in driving capacity than, the other transistor. The one transistor is controlled in switching timing different from the other transistor.

 
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> Analog-digital converter with advanced scheduling

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