Structures and methods for write once read only memory employing charge trapping are provided. The write once read only memory cell includes a metal oxide semiconductor field effect transistor (MOSFET) in a substrate. The MOSFET has a first source/drain region, a second source/drain region, and a channel region between the first and the second source/drain regions. A gate insulator is formed opposing the channel region. The gate insulator includes a number of high work function nanoparticles. A gate is formed on the gate insulator. A plug is coupled to the first source/drain region and couples the first source/drain region to an array plate. A transmission line is coupled to the second source/drain region. The MOSFET is a programmed MOSFET having a charge trapped in the number of high work function nanoparticles in the gate insulator adjacent to the first source/drain region.

 
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> Nanocircuitry for sensing, recording and outputting data

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