An apparatus and a method for transmitting data between transmission
systems using clock sources having dissimilar phases is disclosed. After
monitoring a state of a transmission system of the other party, when the
transmission system of the other party is in a normal state, a write
address is generated according to a first system clock, and generation of
a read address is enabled after a prescribed time interval has elapsed
from the generation time of the write address. By generating the write
address and a read address with a certain time interval, it is possible
to prevent a write address and a read address from being generated at the
same time, and accordingly address collision and data loss caused by
address collision can be prevented.