A system is configured to selectively block peripheral accesses to system
memory. The system includes a secure execution mode (SEM)-capable
processor configured to operate in a trusted execution mode. The system
also includes a system memory including a plurality of addressable
locations. The system further includes a memory controller that may
determine a source of an access request to one or more of the plurality
of locations of the system memory. The memory controller may further
allow the access request to proceed in response to determining that the
source of the access request is the SEM-capable processor.