An analog-to-digital converter (ADC) circuit that converts an analog input signal into a digital output circuit includes a noise shaping first stage cascaded with a pipelined second stage. The first stage includes a sample-and-hold circuit and a first order modulator, where the first order modulator includes a noise shaping filter, a FLASH ADC and a feedback DAC. A digital dither generator is used to provide a dither signal to the ADC circuit. The second stage includes a switching circuit and an ADC. A calibration filter connected to the second stage calibrates the ADC circuit. A first reconstruction filter and a second reconstruction filter are used to recombine outputs of the first stage and the second stage of the ADC circuit. The ADC circuit allows high resolution analog-to-digital conversion at a low over-sampling rate and low power dissipation levels.