A semiconductor packaging device comprises a carrier having at least a cavity or a slot thereon. At least a chip has a back surface and an active surface with a plurality of first bonding pads. The chip is affixed to the cavity to expose the active surface. A first insulating layer is on the active surface and the carrier, which comprises first via-conductor connected to first bonding pads and via the first insulating layer. A multi-layer structure on the first insulating layer comprises a plurality of conductive layout lines, second via-conductor therein, and a second insulating layer, exposed ball pads, and flip-chip pads thereon. The first via-conductor are electrically connected with the conductive layout lines, the second via-conductor, the exposed ball pads, and the flip-chip pads. The first solder balls are affixed to the ball pads, and at least a second chip is affixed to the flip-chip pads through a plurality of second solder balls.

 
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< Semiconductor device, electrical inspection method thereof, and electronic apparatus including the semiconductor device

> Interposer substrate and wafer scale interposer substrate member for use with flip-chip configured semiconductor dice

> Packaged semiconductor device

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