When the substrate bias voltage Vbb lowers by the pumping operation of the charge pump circuit, a drain-to-source resistance of the N-transistor becomes high. When a first power supply voltage Vcc is set at high value, a drain-to-source current of the N-transistor increases (I+.DELTA.I1), however the drain-to-source current decreases (I+.DELTA.I1-.DELTA.I2) by the increase of the drain-to-source current owing to the substrate bias effect so that the increase of the potential of the node N34 caused by the increase of the first power supply voltage VCC is restrained. As a result, a reference level of the substrate bias voltage Vbb does not largely lower than the reference level of the substrate bias voltage. Vbb when the first power supply voltage VCC is in a standard level.