Gather and scatter operations are used when elements of a vector which may be operated on in parallel are not located at successive addresses in memory. Prior data processing systems required complex address calculation hardware and other hardware to perform vector gather and scatter operations. By contrast, one embodiment of the present invention implements gather and scatter operations using a plurality of deposit and extract instructions. As a result, gather and scatter operations may be efficiently performed within a general purpose processing environment and without the need for dedicated gather/scatter hardware.

 
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< Translation look aside buffer (TLB) with increased translational capacity for multi-threaded computer processes

> Method for referring to address of vector data and vector processor

> Microcontroller Operable in normal and low speed modes utilizing control signals for executing commands in a read-only memory during the low speed modes

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