A semiconductor memory device is provided for preventing a late-write from disturbing a refresh operation and also for reducing a current consumption in a write cycle with execution of the late-write. Upon a transition of an address ADD, an address transition detector circuit detects this address transition. Upon receipt of a result of detection by the address transition detector circuit, a state control circuit judges an operation to be executed, from an output enable signal /OE and a write enable signal /WE, and then outputs any of a read statement RS, a write statement WS, and a refresh statement FS. According to a clock signal ACLK, input signals such as addresses are taken for executions of operations based on the statements.

 
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