A checkpointing method and system that utilize a write back controller. The system can include a first controller for implementing a first function, wherein the first function comprises part of a checkpoint operation and wherein the checkpoint operation comprises a series of contiguous checkpoint cycles. The system can also include a second controller, the second controller for implementing a second function, wherein the second function comprises a write back operation from a first memory location to a second memory location and wherein the write back operation occurs before a checkpoint cycle ends. Information already at the second memory location can be selectively written back to a third memory location.

 
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