One embodiment of the present invention provides a technique for assembling semiconductor chips. First, multiple semiconductor chips are permanently laminated together into a plurality of laminated chip assemblies, wherein the semiconductor chips within the laminated chip assembly communicate with each other through electrically conductive connections. Next, laminated chip assemblies are stacked together to form a stack of semiconductor chips without permanently bonding the laminated chip assemblies together, wherein the laminated chip assemblies communicate with each other using capacitive coupling.

 
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< Building metal pillars in a chip for structure support

< Packaged microelectronic devices including first and second casings

> Three-dimensional stacked semiconductor package with metal pillar in encapsulant aperture

> Semiconductor cooling system and process for manufacturing the same

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