A three-dimensional stacked semiconductor package includes first and second semiconductor chip assemblies. The first semiconductor chip assembly includes a first chip, a first conductive trace and a first encapsulant, and the first conductive trace includes a first metal pillar. The second semiconductor chip assembly includes a second chip, a second conductive trace and a second encapsulant, and the second encapsulant includes a second aperture. The first metal pillar extends into the second aperture.

 
Web www.patentalert.com

< Packaged microelectronic devices including first and second casings

< Method and apparatus for using capacitively coupled communication within stacks of laminated chips

> Semiconductor cooling system and process for manufacturing the same

> Method for fabricating a metal-insulator-metal capacitor in a semiconductor device

~ 00272