A multichip cube structure having a foamed insulating material disposed between adjacent integrated circuit chips. The foamed insulating material has lower dielectric constant and therefore reduces the capacitive coupling between electrical interconnects on adjacent chips. The foamed insulating material also has higher ductility and lower thermal coefficient of expansion than conventional oxide insulators so as to reduce the occurrence of stress induced cracking in circuitry.

 
Web www.patentalert.com

< Graft oligomeric electrolytes

< Photomask assembly and method for protecting the same from contaminants generated during a lithography process

> Copper recess process with application to selective capping and electroless plating

> Capped pyrazinoylguanidine sodium channel blockers

~ 00271