A terminal includes at least one wireless communication application module (1)
and a plurality of further application modules (4, 5, 6, 8). Multiple radio
frequency clock signals are generated for the different modules having respective
clock frequency characteristics and including at least first and second clock frequencies
that are not integral multiples nor sub-multiples of each other nor of a third
frequency. The clock generation comprises reference frequency means (14),
fractional-N phase-locked loop frequency synthesizer means (15) responsive
to the reference frequency means, and different automatic frequency control means
for adjusting clock frequencies relative to received signals.
The reference frequency means (14) is arranged to supply a common reference
frequency signal to a plurality of the fractional-N phase-locked loop frequency
synthesizer means (17, 18, 19, 25, 26, 41,42) that supply the first and
second clock frequencies respectively for the application modules. Selective activation
means (30,52) selectively activates and de-activates the phase lock loop
means as required by the corresponding application module or modules.