A method for packaging and singulating a wafer having a plurality of micro devices includes providing a multi-lid substrate having a trench having intersection portions and non-intersection portions formed on a first side of the multi-lid substrate. The multi-lid substrate is coupled to the wafer such that the intersection portions of the trench pattern extend adjacent to at least three micro devices. Portions of the multi-lid substrate between a second side of the multi-lid substrate and the trench pattern are removed while the multi-lid substrate is coupled to the wafer.

 
Web www.patentalert.com

< Pattern forming method and method for manufacturing semiconductor device

< -2,3-Sialyltransferase polypeptides

> Molecular sieve catalyst composition, its production and use in conversion processes

> Digital multilevel non-volatile memory system

~ 00251