A semiconductor structure and a process for fabricating the semiconductor structure. The structure includes a first and second rigid dielectric layer and a first non-rigid dielectric wiring level between such layers. The non-rigid layer includes at least one interconnect. Dummy fill shapes are associated with the non-rigid dielectric wiring level for preventing local stresses and deflections in the vicinity of the interconnect. In one aspect, the dummy fill shapes are in proximity to the interconnect which have a coefficient of thermal expansion substantially the same as the first and second rigid dielectric layer and/or provide that the average local CTE matches the CTE of the surrounding regions and the interconnect as a whole.