An information server with power-aware adaptation that enables power reduction while minimizing the performance impact of power reduction. An information server according to the present techniques includes a transaction prioritizer that determines which of a set of memory subsystems in the information server is to cache a set of data associated with each incoming information access transaction and further includes a power manager that performs a power adaptation in the information server in response to a set of ranks assigned to the memory subsystems. An association of priorities of the incoming information access transactions to appropriately ranked memory subsystems and the judicious selection of memory subsystems for power adaptation enhances the likelihood that higher priority cached data is not lost during power adaptation.

 
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< Memory bus interface for use in a peripheral device

< Memory controller with power management logic

> System and method for controlling access to storage in a distributed information handling system

> Burst counter controller and method in a memory device operable in a 2-bit prefetch mode

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