Porous dielectric layers are produced by introducing small vertical or columnar gaps in pre-formed layers of dense dielectric. The pores may be formed by a special process that is different from the processes employed to form metal lines and other features on a VLSI device. Further, the columnar gaps may be produced after the planarization process for a particular layer has been completed. Then, after the pores are formed, they are capped by depositing another layer of material. In this manner, the newly porous layer is protected from direct exposure to the pressure of subsequent planarization processes. In alternative embodiments, the processes described herein are applied to introduce pores into a pre-formed layer of semiconductor to produce a porous semiconductor layer.

 
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