The invention specifies a circuit arrangement for voltage regulation in which, in addition to a control loop having a comparator (4), an output stage (3) and a feedback path, an auxiliary regulator (11-14) is provided which limits the voltage drop across the output stage (3) and, for this purpose, comprises a control element (11) and a further comparator (13). Hence, the output stage (3) of the voltage regulator may advantageously have a withstand voltage which is lower than the supply voltage which can be supplied at the input (1). On account of its good supply voltage suppression, the voltage regulator described is particularly well suited to supplying on-chip VCOs.

 
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