A network device including at least one network port, a clock, address resolution logic (ARL) tables, and address resolution logic. The clock generates a timing signal. The ARL tables are configured to store and maintain data related to port addresses of the network device. The address resolution logic is coupled to the ARL tables and the clock, and configured to search the ARL tables and to perform learning concurrently during alternating slots of the timing signal. Upon receiving a data packet at the at least one port, the address resolution logic is configured to search the ARL tables for a destination address based on the data packet. When the destination address is found, the address resolution logic is configured to update a related record of the ARL tables based on the learning, the address resolution logic configured to perform searches and updates.

 
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