Improved sensing of ferroelectric memory cells is disclosed. When a memory access is initiated, the bitlines are precharged to a negative voltage, for example, -0.5 to -1.0V. This increases the effective plateline pulse (V_PLH) to V_PLH+the magnitude of the negative voltage. This results in an increase in the difference between V_HI and V_L0 read signals, thereby increasing the sensing window.