A single transistor ferroelectric memory ("FEM") cell, useful for high density ferroelectric random access memory ("FRAM") applications, and a method for making the same, are herein disclosed. The FEM cell comprises a FEM gate unit having a top electrode, a ferroelectric material layer, and a bottom electrode. The FEM gate unit is disposed above a semiconductor substrate having defined on it a well region and channel of a first conductive type and a source and drain of a second conductive type. A conductive upper polysilicon layer covers both the FEM gate unit and a portion of the source region and is in electrical communication with the top electrode of the FEM gate unit. The drain is in electrical communication with the bottom electrode of the FEM gate unit and serves as the bit line for the FEM memory cell. The source is shared between the present memory cell and an adjacent cell.

 
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> Nonvolatile ferroelectric memory device having a multi-bit control function

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