A microcomputer with a built-in flash memory is obtained in which the flash memory can be properly rewritten with a rewrite program kept placed on the flash memory and without requiring additional complicated control circuitry. On accepting an erase/write command which constitutes a rewrite command, a flash memory module (2) outputs to a flash memory control circuit (3) a ready status signal RYIBY indicative of a busy state during execution of the series of processing. When the ready status signal RYIBY indicates the busy state, the flash memory control circuit (3) outputs a hold signal HOLD at active "H," in order to inhibit a CPU (1) from accessing the flash memory module (2). When the ready status signal RYIBY has recovered the ready state, the flash memory control circuit (3) outputs the hold signal HOLD at "L" to allow the CPU (1) to access the flash memory module (2).